About the job
As a Layout Hardware Engineer, you will support the physical design of quantum processors and associated analog, DC, and RF devices. You will work closely with designs and architectures as our devices scale in size and complexity. Your activities will span from laying out specific test masks, to integrating physical design metadata into software touching all aspects of the research activity.
Responsibilities
Leverage programmatic layout tools to integrate metadata into all aspects of the research activity (e.g., device probing, packaging, simulation, and measurement setups).
Develop programmatic layout infrastructure for speeding up and simplifying layout workflow from initial layout to final tapeout.
Support the Device team with layout projects.
Support custom process design kits (PDKs) and design rule check (DRC).
Minimum qualifications:
Bachelor's degree in Electrical Engineering, Computer Science, Physics, or equivalent practical experience.
Experience with programmatic layout and verification software.
Experience with Python or other programming languages.
Experience with software design/development
Preferred qualifications:
Experience with version control.
Experience with emerging and experimental technologies (MRAM, Photonics, RSFQ).
Knowledge of Cadence DFII SKILL, PCell development.
Familiarity with integrated circuits (IC) fabrication processes.
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